Analysis of continuous-time oversampled sigma-delta modulator with excess loop delay

Abstract

This paper presents an efficient circuit-level simulation method for analyzing the effect of the excessive loop delay of continuous-time oversampled sigma-delta modulators (SDMs). The method is based on the sampled-data simulation of linear circuits. The high accuracy is achieved using numerical Laplace inversion. All circuit elements except the quantizer are formulated using a circuit-level approach. The behavior of the quantizer is depicted using a behavior model to avoid the difficulties arising from its harsh nonlinear characteristics. As compared with the modified z-transform approach for analysis of continuous-time over-sampled SDMs, the proposed method is a circuit-level simulation method that offers the efficiency, the accuracy, as well as the ability of handling general nonidealities of circuits. The effectiveness of the proposed method is evaluated using a second-order continuous-time SDM.