Design of Multi-Stacked CMOS mm-Wave Power Amplifiers for Phased Array Applications Using Triple-Well Process

Abstract

This paper concerns with the design of multi-stacked CMOS millimeter-wave power amplifiers suitable for phased array front-end applications using triple-well process. The parasitics posed by the triple-well technique are studied and compensated using negative capacitance technique for proper operation. The design technique is evaluated using TSMC 28nm CMOS process at 28GHz operating frequency as a candidate operating band for 5G systems. The results illustrate a power gain of 25dB, 22dBm saturated power, and a maximum 38% PAE along with superior phase alignment between stacks.