Improved performance of mn-thin gate insulating layer formed by ex-situ dry oxi-nitridation process upon GaAs : GaAs-MISFET

M. Takebe, N. C. Paul, K. Nakamura, M. Tametou, K. Iiyama, S. Takamiya
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Abstract

In 2001, the authors demonstrated performance of GaAs MOS-diodes with nm-thin directly oxidated layers fromed by W & ozone process 111. The thin oxide layers are effective in suppressing gate leakage current. However, a MOSFET based on it has hysteresis in current-voltage curves, and a dip in transconductance at a gate voltage around the flatband voltage 121. H. Ikoma et al. showed good influence of nitridation upon oxidated GaAs surfaces [3]. We also demonstrated in 2002 excellent influences of oxi-nitridation (nitrogen plasma treatment after UV & ozone oxidation) of (100) GaAs surfaces, results of which were characterized from view points of 0 S interface structure (observed by E M ) , photoluminescence and electrical performances of MIS diodes 14, 51. The process gives a very flat interface between a fm insulating GaON layer and a GaAs with very little crystallographic disorder. The nitridation, applied to an oxidated GaAs surface, improves the photoluminescence intensity, decreases a leakage current, and improves C-V characteristics. Figure 1 shows C-V curves of MIS diodes with nm-thin 8 hrs oxidated layer (a) and 8 hrs-nitridated-after-8 hrsoxidation layer (b), respectively. The nitridation improves Schottky barrier height from 0.5 eV to 1.1 eV, and decreases the capacitance in the forward voltage region. We applied this process to forming the gate insulating f h s of GaAs-MISFETs and obtained excellent results which demonstrate reproducibility of the above experiment. We used n W = 3E17Icc. t = 400 nm)/S.LGaAs epitaxial wafer. After gate recess-etching with a gate electrode pattern, oxidation by the W & ozone for 4 hours and 0 to 2 hours nitridation by helicon plasma system at an RF power of 50 W were applied before forming A1 gate electrode. The gate length is about 1 p n (designed). Thickness of the insulator, measured with a monitor wafer is ahout 8 nm. Figure 2 shows drain currents vs. drain voltage of simply 4 hr-oxidated gate MOSFET (a) and the 4 hr-oxi-2 hr-nitridated gate MISFET (b), for drain voltage up and down conditions. The gate insulator formed only the oxidation (a) shows large hysteresis, while that formed by oxi-nitridation (b) shows no hysteresis, and better pinch-off. Figure 3 shows gate voltage dependence of transconductances of the MOSF'ET, 4 hr-oxi-1 hr-nitridated, and 4 hr-oxi-2 hr-nitridated MISFETs. Both of the transconductance and the pinchi-off performances are drastically improved by the nitridation process. The maximum transconductance (110 mS/mm) is obtained at a gate voltage of 1.1 V. Which suggests that the MIS junction has very little defects and extra charges at and near the IS interface. [ l ] T. Sugimura et al., Solid-state Electronics, 43, pp.1571-1576 81999) [Z] K. Iiyama et al., IEEETrans. Electron Devices, 49,11, pp.1856-1862 (20029 [31 H. Ikoma et al., J. Appl. Phys., 85, pp.32343240 (1999) 141 N. C. Paul et al., Cod. Proc. IPRM 2002, Stockholm, pp.217-220 (2002) 1.51 N. C. Paul et al., Jpn. J. Appl. Phys., will be published in near future.
GaAs: GaAs- misfet非原位干式氧化氮化工艺制备的锰薄栅极绝缘层性能的改善
2001年,作者展示了采用W &臭氧法制备的纳米薄直接氧化层的GaAs mos二极管的性能。薄氧化层能有效抑制栅漏电流。然而,基于它的MOSFET在电流-电压曲线上具有迟滞性,并且在平坦带电压121附近的栅极电压处跨导率下降。H. Ikoma等人研究了氮化对氧化GaAs表面的良好影响[3]。我们还在2002年证明了氧化氮化(紫外和臭氧氧化后的氮等离子体处理)对(100)GaAs表面的良好影响,其结果从0 S界面结构(通过电镜观察),光致发光和MIS二极管的电学性能14,51等方面进行了表征。该工艺在fm绝缘GaON层和GaAs层之间提供了一个非常平坦的界面,晶体学混乱很小。氮化作用于氧化的GaAs表面,提高了光致发光强度,降低了漏电流,改善了C-V特性。图1为纳米级氧化8 h层(a)和氧化8 h后氮化8 h层(b)的MIS二极管的C-V曲线。氮化将肖特基势垒高度从0.5 eV提高到1.1 eV,并降低了正向电压区电容。我们将此工艺应用于gaas - misfet的栅极绝缘,并获得了良好的结果,证明了上述实验的可重复性。我们用n W = 3E17Icc。t = 400 nm)/S。LGaAs外延片。用栅极图案刻蚀栅极凹槽后,用W和臭氧氧化4小时,用螺旋等离子体系统在50 W的射频功率下氮化0 ~ 2小时,形成A1栅极。栅极长度约为1pn(设计值)。用监控晶片测量的绝缘体厚度约为8nm。图2显示了漏极电压上下两种情况下,4小时氧化栅极MOSFET (a)和4小时氧化-2小时氮化栅极MISFET (b)的漏极电流与漏极电压的关系。仅氧化(a)形成的栅极绝缘子滞回较大,而氧化-氮化(b)形成的栅极绝缘子无滞回,掐断效果较好。图3显示了MOSF'ET、4小时-氧-1小时氮化和4小时-氧-2小时氮化misfet跨导的栅极电压依赖性。氮化处理大大提高了跨导性和针尖关化性能。当栅极电压为1.1 V时,可获得最大跨导(110 mS/mm)。这表明,MIS结有非常小的缺陷和额外的电荷在和接近IS接口。[1]李志强,李志强,李志强,等。固态电子技术的研究进展[j] .电子技术与工程,2001,11(2):1- 7。李建军,张建军,张建军,等。电子器件与器件,20029 [31]理论物理。(1)李建平等人,主编。(1) n.c. Paul et al., Jpn。j:。理论物理。,将在不久的将来出版。
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