Improving Dual-Slope A/D Converter with Noise-Shaping and Digital Filtering Techniques

Abstract

The paper describes a modification of a dual-slope ADC (Analog to Digital Converter) by using oversampling, noise-shaping and digital filtering techniques. Elaborated MATLAB/SIMULINK models were used to verify the proposed solution. The simulation results show the improvement such as 4-bit dual-slope ADC can be used to reach an effective resolution compatible with 10 bits. The physical implementation of the proposed CIC filter was synthesized into FPGA Artix-7 platform.