{"title":"Impact of deflashing process and Sn plating parameters towards temperature cycle on board (TCoB) reliability","authors":"J. Krishnan, H. Sax","doi":"10.1109/ESTC.2014.6962810","DOIUrl":null,"url":null,"abstract":"In semiconductor devices, the common Temperature Cyle on Board Failure (TCoB) are open contacts due solder joint cracks after 2000 to 4000 temperature cycles on board - as shown in figure 1 depending on individual ECU configuration and applied temperature swing. Recently, we also encounter TCoB reliability failure, but this solder joint cracks happen along lead rather than through the solder. For this case the failure already appeared after 850 cycles, while other components on the exactly same board do not show a sign of degradation as can be seen at figure 2 and 3. This paper objective is to describes the critical factors that impact the Temperature Cycles on Board (TCoB) performance of a solder joint. The TCoB performance of lead free solder joints does not only depend on the solder paste and package Bill Of Material (BOM) used. Quality of final Sn finish as well as lead frame pre treatment and lead frame surface properties can also impact the TCoB performance of a lead free solder joint heavily. The service life of a lead free solder joint using bare Cu lead frame together with final Sn plating can significantly be improved considering the below findings: a) Carbon in the Sn plated layer from high additive concentrations or from Carbon contaminated electrolytes have to be avoided. b) Use Plating Current density lower than 20 ASD as parasitic carbon deposition is enhanced if a too high plating current density is used (>20ASD). c) Avoid using Media Deflashing Process because the leadframe surface will be damage thus prevents good Cu diffusion from base material. Cu/Sn inter diffusion has to be promoted to form a regular low stress intermetallic where the ratio of Cu6Sn5/Cu3Sn is approximately 1. d) Removing the damage top 1-2μm Cu base material cause by Cu sheet rolling from the lead frame processing using appropriate Cu descaling process or plating an additional thick Cu flash layer (>2μm) ensures good regular low stress intermetallic.","PeriodicalId":299981,"journal":{"name":"Proceedings of the 5th Electronics System-integration Technology Conference (ESTC)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-11-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 5th Electronics System-integration Technology Conference (ESTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESTC.2014.6962810","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
In semiconductor devices, the common Temperature Cyle on Board Failure (TCoB) are open contacts due solder joint cracks after 2000 to 4000 temperature cycles on board - as shown in figure 1 depending on individual ECU configuration and applied temperature swing. Recently, we also encounter TCoB reliability failure, but this solder joint cracks happen along lead rather than through the solder. For this case the failure already appeared after 850 cycles, while other components on the exactly same board do not show a sign of degradation as can be seen at figure 2 and 3. This paper objective is to describes the critical factors that impact the Temperature Cycles on Board (TCoB) performance of a solder joint. The TCoB performance of lead free solder joints does not only depend on the solder paste and package Bill Of Material (BOM) used. Quality of final Sn finish as well as lead frame pre treatment and lead frame surface properties can also impact the TCoB performance of a lead free solder joint heavily. The service life of a lead free solder joint using bare Cu lead frame together with final Sn plating can significantly be improved considering the below findings: a) Carbon in the Sn plated layer from high additive concentrations or from Carbon contaminated electrolytes have to be avoided. b) Use Plating Current density lower than 20 ASD as parasitic carbon deposition is enhanced if a too high plating current density is used (>20ASD). c) Avoid using Media Deflashing Process because the leadframe surface will be damage thus prevents good Cu diffusion from base material. Cu/Sn inter diffusion has to be promoted to form a regular low stress intermetallic where the ratio of Cu6Sn5/Cu3Sn is approximately 1. d) Removing the damage top 1-2μm Cu base material cause by Cu sheet rolling from the lead frame processing using appropriate Cu descaling process or plating an additional thick Cu flash layer (>2μm) ensures good regular low stress intermetallic.