Quantized Analog RX Front-End for SAW-Less Applications

J. Musayev, A. Liscidini
{"title":"Quantized Analog RX Front-End for SAW-Less Applications","authors":"J. Musayev, A. Liscidini","doi":"10.1109/ESSCIRC.2018.8494308","DOIUrl":null,"url":null,"abstract":"A quantized analog RX front-end is presented, where the input signal is split and processed by an array of RF analog front-ends. This approach allows to expand the dynamic range of the receiver while keeping a low power and a low voltage supply. A prototype integrated in 65nm CMOS technology shows a compression point up to 10.5dBm, IIP3 between 1 to 20.5dBm and IIP2 between 45 to 75dBm, a noise figure in sensitivity equal to 1.9dB while consuming 14mW for the analog signal amplification and 37.5mW/GHz for the clock generation and distribution. The active area is only 0.25mm2.","PeriodicalId":355210,"journal":{"name":"ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (ESSCIRC)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (ESSCIRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2018.8494308","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7

Abstract

A quantized analog RX front-end is presented, where the input signal is split and processed by an array of RF analog front-ends. This approach allows to expand the dynamic range of the receiver while keeping a low power and a low voltage supply. A prototype integrated in 65nm CMOS technology shows a compression point up to 10.5dBm, IIP3 between 1 to 20.5dBm and IIP2 between 45 to 75dBm, a noise figure in sensitivity equal to 1.9dB while consuming 14mW for the analog signal amplification and 37.5mW/GHz for the clock generation and distribution. The active area is only 0.25mm2.
量化模拟RX前端的SAW-Less应用
提出了一种量化模拟RX前端,其中输入信号被射频模拟前端阵列分割和处理。这种方法可以扩大接收机的动态范围,同时保持低功率和低电压供电。采用65nm CMOS技术集成的样机显示,压缩点高达10.5dBm, IIP3在1 ~ 20.5dBm之间,IIP2在45 ~ 75dBm之间,灵敏度噪声系数为1.9dB,模拟信号放大消耗14mW,时钟产生和分配消耗37.5mW/GHz。活动面积仅为0.25mm2。
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