A New Monitor Insertion Algorithm for Intermittent Fault Detection

Abstract

The dependability of highly dependable systems relies on the reliability of its components and interconnections. One of the most challenging faults that threatens the reliability of interconnections in a system are intermittent resistive faults (IRFs). They may occur randomly in time, duration and amplitude in every interconnection. The occurrence rate can vary from a few nanoseconds to months. As a result, evoking and detecting such faults is a major challenge. In this paper, IRF detection at the chip level has been tackled by utilising a fully digital insitu IRF monitor. This paper introduces a new algorithm for inserting IRF monitors in a design. The goal of this algorithm is to minimise the number of IRF monitors while providing a high fault coverage for IRFs. The algorithm has been validated using software-based fault injection. The simulation results show that the proposed algorithm improves the IRF coverage at the chip level at the cost of a small area and power-consumption overhead.