Integrable, High-efficiency Vertical-cavity Laser Arrays For Smart Pixels

Abstract

Recent work with intra-cavity contacted vertical-cavity lasers on semi-insulating substrates has resulted in very efficient, high speed arrays of devices that are compatible with integration with electronic circuits. This and other related work will be reviewed. Due to inherent geometrical advantages, vertical-cavity surface-emitting lasers (VCSELs) are attractive candidates for smart pixel schemes which require 1-D or 2-D arrays that emit light normal to the chip surface. Recent improvements in these devices have resulted in temperature insensitive operation [I], drive voltages e 3 Volts [2-41, wall-plug efficiencies as high as 17.3% [2], and lateral side-mode supression as high as 2.6 mW [5]. This surge in performance now makes hybrid or monolithic integration of arrays of VCSELs with electronic circuits a desirable pursuit. To realize the full integration capability of VCSELs, we have recently made devices with intra-cavity contacts on semi-insulating substrates to reduce parasitic capacitances, electrically isolate devices, and provide both contacts on the top surface. [6, 71 This improvement pushes the high-speed performance limit to the intrinsic bandwidth limitation of the laser active region, eliminates electrical crosstalk, allows for more driver circuit configurations, facilitates high speed packaging and hybrid integration, and allows for wafer level microwave probing. Figure 1 shows a schematic picture of the two types of devices fabricated. Device A uses a single n-type intra-cavity contact and low-barrier (Al0.67Gao.33AslGaAs) p-type top distributed Bragg reflector DBR, while device B uses two intra-cavity contacts to inject the current. Both devices have unintentionally doped bottom DBRs and use current spreading layers in the intracavity contact regions to reduce the effects of current crowding. The D.C. performance of both devices compares well with the best reported VCSEL results. Wall-plug efficiencies for both devices are shown in Fig. 2. In both cases, the small devices (7 pm for device B and 6 pm for device A) have their peak efficiencies near 1mW of output power with currents less than 4 mA and input powers less than 12 mW. This type of operation is good for high density arrays, where high efficiency at low power consumption levels is needed. The larger devices have higher wallplug efficiencies at higher input powers, but are capable of producing more than 3mW of power. This larger size is good for applications requiring lower densities, but higher fan-outs. High-speed measurements on arrays of device B have also recently been made. Figure 3 shows an SEM picture of a high-speed array with on-chip microwave lines and Fig. 4 shows the 3dB bandwidth versus bias level for the various diameter devices. The 7 pm laser achieves a thermally limited 8.5 GHz of modulation at a bias of only 4 mA with a modulation efficiency of 5.7GHz/z/mA ( higher than any in-plane laser reported). All sizes are capable of more than 5 GHz maximum modulation. For computer interconnects or smart-pixels low bit-error rates are also needed to ensure computational integrity. Preliminary results show low bit error rates for all device sizes. In summary, recent results from intra-cavity contacted VCSELs show performance levels desirable for smart-pixel arrays. The devices arc: low power consumers ( -lOmW) at their maximum efficiencies( 1 O%), deliver high-speed error-free output, and provide flexibility for different integration schemes. Electrical and thermal measurements indicate that more optimization of the device designs will improve the efficiencies and modulation bandwidths further.