{"title":"Ultra low voltage semi-floating-gate transconductance amplifier based on binary inverters","authors":"Y. Berg","doi":"10.1109/ICECS.2009.5410956","DOIUrl":null,"url":null,"abstract":"In this paper we present an ultra low-voltage differential transconductance amplifier. The amplifier is based on clocked semi floating-gate transistors. Rail to rail input signals may be processed and the amplifier produce a rail to rail output. Simulated data are valid for a STM 90nm CMOS process.","PeriodicalId":343974,"journal":{"name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","volume":"6 4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECS.2009.5410956","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
In this paper we present an ultra low-voltage differential transconductance amplifier. The amplifier is based on clocked semi floating-gate transistors. Rail to rail input signals may be processed and the amplifier produce a rail to rail output. Simulated data are valid for a STM 90nm CMOS process.