{"title":"Specialized custom circuits - Session 6","authors":"J. Snyder","doi":"10.1109/cicc.2004.1358741","DOIUrl":null,"url":null,"abstract":"Deep sub-micron technologies dictated circuit design techniques that emphasized power management through clock gating, dynamic voltage scaling, sleep mode(s), and device sizing; to mention but a few of those techniques. It also enabled a high level of integration which dictated managing several clock domains on a single chip. Meanwhile, noise, signal integrity, and low device breakdown voltages continue to make circuit design more challenging.","PeriodicalId":407909,"journal":{"name":"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/cicc.2004.1358741","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Deep sub-micron technologies dictated circuit design techniques that emphasized power management through clock gating, dynamic voltage scaling, sleep mode(s), and device sizing; to mention but a few of those techniques. It also enabled a high level of integration which dictated managing several clock domains on a single chip. Meanwhile, noise, signal integrity, and low device breakdown voltages continue to make circuit design more challenging.