{"title":"Design and development of a an ultra-low power Intel architecture MCU class SoCs","authors":"Peter Barry","doi":"10.1109/HOTCHIPS.2016.7936206","DOIUrl":null,"url":null,"abstract":"■ First iteration right ballpark in terms of performance/area/power/cost ■We Continue to -Continue to iterate on the micro architecture -Process related micro-architecture evolution -Analog IP evolution","PeriodicalId":363333,"journal":{"name":"2016 IEEE Hot Chips 28 Symposium (HCS)","volume":"139 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Hot Chips 28 Symposium (HCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HOTCHIPS.2016.7936206","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
■ First iteration right ballpark in terms of performance/area/power/cost ■We Continue to -Continue to iterate on the micro architecture -Process related micro-architecture evolution -Analog IP evolution