M. Mergens, J. Armer, P. Jozwiak, B. Keppens, Frederic De Ranter, K. Verhaege, R. Kumar
{"title":"Active-source-pump (ASP) technique for ESD design window expansion and ultra-thin gate oxide protection in sub-90nm technologies","authors":"M. Mergens, J. Armer, P. Jozwiak, B. Keppens, Frederic De Ranter, K. Verhaege, R. Kumar","doi":"10.1109/CICC.2004.1358790","DOIUrl":null,"url":null,"abstract":"This paper presents a novel active-source-pump (ASP) circuit technique to significantly lower the ESD sensitivity of ultrathin gate inputs in advanced sub-90nm CMOS technologies. As demonstrated by detailed experimental analysis, an ESD design window expansion of more than 100% can be achieved. This revives conventional ESD solutions for ultrasensitive input protection also enabling low-capacitance RF protection schemes with a high ESD design flexibility at IC-level. ASP IC application examples, and the impact of ASP on normal RF operation performance, are discussed.","PeriodicalId":407909,"journal":{"name":"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)","volume":"223 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-11-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"17","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.2004.1358790","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 17
Abstract
This paper presents a novel active-source-pump (ASP) circuit technique to significantly lower the ESD sensitivity of ultrathin gate inputs in advanced sub-90nm CMOS technologies. As demonstrated by detailed experimental analysis, an ESD design window expansion of more than 100% can be achieved. This revives conventional ESD solutions for ultrasensitive input protection also enabling low-capacitance RF protection schemes with a high ESD design flexibility at IC-level. ASP IC application examples, and the impact of ASP on normal RF operation performance, are discussed.