A 5–20 Gb/s power scalable adaptive linear equalizer using edge counting

Abstract

A 5-20Gb/s power scalable adaptive continuous-time linear equalizer (CTLE) using edge counting is fabricated in 40-nm CMOS technology. The power of this CTLE is adjusted according to the bit rates to improve the power efficiency. An edge counting technique with an asynchronous clock is presented to adaptively adjust the gain and power of this CTLE. All the measured bit error rates are less than 10-12 over a 5m cable.