A. Pradeep, S. Radha, Nestham Sujay, Panchagnula Venkata Janaki Ram, G. V. Ganesh, P. Nagabushanam
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引用次数: 0
Abstract
Encoders are crucial for digital storage, memory technologies. There exist many approaches to increase the performance of encoders. In this paper, we considered 8-bit and 64-bit prioritized encoders, where LSB bit in the input is given higher priority and prioritization is carried out prior to encoder process. Thereby, latency in 64-bit is at least 8 times that of latency in 8-bit. Further using multi-match priority in which input 64 bit is split into 8 sections and prioritization is done prior to encoder which improves the performance. Simulation is carried out in Xilinx.