A resistor-free 4.266 Gbps LPDDR4 I/O in 10 nm FinFET CMOS technology

T. Lu, M. Hsieh, Tien-Chien Huang, Chin-Ming Fu, Chih-Hsien Chang, K. Hsieh
{"title":"A resistor-free 4.266 Gbps LPDDR4 I/O in 10 nm FinFET CMOS technology","authors":"T. Lu, M. Hsieh, Tien-Chien Huang, Chin-Ming Fu, Chih-Hsien Chang, K. Hsieh","doi":"10.23919/VLSIC.2017.8008478","DOIUrl":null,"url":null,"abstract":"This paper presents a 4.266 Gbps LPDDR4 I/O with resistor-free on-die termination (ODT). The resistor-free ODT utilizes resistor-free driving unit (RFDU) with adaptive bias unit (ABU). The ABU adopts source-follower based structure which provides an adaptive bias voltage to compensate the saturated ID current caused non-linearity. The proposed LPDDR4 I/O is fabricated in 10 nm FinFET technology with the post-driver area of 0.0025mm2. The measurement result shows that the calibrated ODT resistances among 63 dies all meet LPDDR4 specifications. Furthermore, the eye opening of 0.73 UI is achieved with 4.266 Gbps PRBS pattern.","PeriodicalId":176340,"journal":{"name":"2017 Symposium on VLSI Circuits","volume":"219 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 Symposium on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/VLSIC.2017.8008478","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

Abstract

This paper presents a 4.266 Gbps LPDDR4 I/O with resistor-free on-die termination (ODT). The resistor-free ODT utilizes resistor-free driving unit (RFDU) with adaptive bias unit (ABU). The ABU adopts source-follower based structure which provides an adaptive bias voltage to compensate the saturated ID current caused non-linearity. The proposed LPDDR4 I/O is fabricated in 10 nm FinFET technology with the post-driver area of 0.0025mm2. The measurement result shows that the calibrated ODT resistances among 63 dies all meet LPDDR4 specifications. Furthermore, the eye opening of 0.73 UI is achieved with 4.266 Gbps PRBS pattern.
采用10nm FinFET CMOS技术的无电阻4.266 Gbps LPDDR4 I/O
本文提出了一种4.266 Gbps的LPDDR4 I/O,具有无电阻片上终端(ODT)。无电阻ODT采用无电阻驱动单元(RFDU)和自适应偏置单元(ABU)。ABU采用基于源-从动器的结构,提供自适应偏置电压来补偿饱和内径电流引起的非线性。所提出的LPDDR4 I/O采用10 nm FinFET技术制造,后驱动面积为0.0025mm2。测量结果表明,校正后的63个模具的ODT电阻均符合LPDDR4规格。此外,以4.266 Gbps的PRBS模式实现了0.73 UI的开放。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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