Sub-micron polysilicon Gate CMOS/SOS technology

A. Ipri
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引用次数: 6

Abstract

A process sequence incorporating the lateral diffusion of Boron into polycrystalline silicon for the fabrication of CMOS/SOS transistors and integrated circuits is described. The resulting polysilicon gate dimensions and channel lengths are typically between 0.2 µm and 2.0 µm. Yield values associated with these narrow polysilicon lines are shown to be equal to present 5 µm yield values. Ring oscillators have been fabricated having 0.5 µm channel lengths which exhibit propagation delays of 200 ps at 5v. In addition, 10 stage dynamic binary counters have also been fabricated having 0.5 µm channel lengths and a maximum input frequency of 600 MHz at 12v and 200 mW was attained.
亚微米多晶硅栅CMOS/SOS技术
描述了一种将硼横向扩散到多晶硅中的工艺序列,用于制造CMOS/SOS晶体管和集成电路。所得到的多晶硅栅极尺寸和通道长度通常在0.2µm和2.0µm之间。与这些窄多晶硅线相关的产率值显示为等于目前的5 μ m产率值。环形振荡器的通道长度为0.5µm,在5v时表现出200 ps的传播延迟。此外,还制作了10级动态二进制计数器,通道长度为0.5µm,在12v和200mw时的最大输入频率为600 MHz。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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