Reproducible submicron gate fabrication of GaAs FET by plasma etching

Abstract

Dry etching is employed in the direct fabrication of the main part of semiconductor devices. A submicron Schottky barrier gate is constructed for GaAs FET's. The gate is composed of double layer metallization. The Au top layer is first delineated by ion milling and the Mo layer in contact with the GaAs substrate is chemically etched in CF4gas plasma. Controlled side etching of the Mo metal produces the submicron gate, leaving a wider top metal of Au. The amount of side etching deviates less than 0.05 µm and the gate length is reduced to 0.1 µm. No appreciable damage to the GaAs substrate is found. Electron mobility is not substantially degraded during the prolonged plasma etching time. The forward I-V relation of the Schottky barrier approximates the ideal characteristics. Half micron gate GaAs FET's fabricated by dry etching achieve high gain and low noise performance in the X-band.