A simulation model for embedding the transistor bias

Abstract

A simulation model for embedding the bias of a transistor is presented. The model exploits the simulators equilibrium point calculation to set the bias point of the transistor The model uses negative feedback to set the bias point according to what the designer desires. When the simulator goes into its main analyses the negative feedback is broken and embedded bias sources are added. This way it is possible to test an amplifier design before implementing the bias circuits. The model is technology independent can be used on any kind of transistor.