Parallel calculation of 3-D parasitic resistance and capacitance with linear boundary elements

Abstract

Because of the widespread application of deep sub-micron and multilayer routing techniques, the interconnection parasitic influence has more and more effect on the performance of VLSI circuits. Parallel direct boundary element calculation of three-dimensional (3-D) resistance and capacitance is an important method for fast extraction. In this paper, a parallel algorithm to implement linear boundary element calculation using PVM (Parallel Virtual Machine, distributed calculating software) is introduced. The hierarchical calculation scheme of the setup and solution processes of linear equations is discussed. At the end, the performance and workload balance of the algorithm are analyzed.