{"title":"Work-in-Progress: DRAM-MaUT: DRAM Address Mapping Unveiling Tool for ARM Devices","authors":"Anandpreet Kaur, Pravin Srivastav, Bibhas Ghoshal","doi":"10.1109/CASES55004.2022.00027","DOIUrl":null,"url":null,"abstract":"In this paper, we propose a software based technique to reveal the DRAM geometry information which is essential in studying various memory based attacks mounted on embedded devices such as Row Hammer. We apply a reverse-engineering approach for retrieving row, column, bank bits of DRAM which may significantly increase the number of bit flips in a Row Hammer test. To the best of our knowledge, the proposed technique is the first work to disclose the entire information about the DRAM chips of any embedded architecture.","PeriodicalId":331181,"journal":{"name":"2022 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES)","volume":"375 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CASES55004.2022.00027","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
In this paper, we propose a software based technique to reveal the DRAM geometry information which is essential in studying various memory based attacks mounted on embedded devices such as Row Hammer. We apply a reverse-engineering approach for retrieving row, column, bank bits of DRAM which may significantly increase the number of bit flips in a Row Hammer test. To the best of our knowledge, the proposed technique is the first work to disclose the entire information about the DRAM chips of any embedded architecture.