Transistor model validation through 50 Ohm, vector network analyzer power sweeps

Abstract

This paper presents a method of validating transistor models using 50 ohm power sweeps from a vector network analyzer (VNA). This validation approach is used with both a heterojunction bipolar transistor (HBT) used in amplifier designs and a pseudomorphic high electron mobility transistor (PHEMT) used in switch designs. The setups measure the vector transmission and input reflection coefficients at the drive frequency as well as the scalar power at the second and third harmonics. For the HBT/amplifier case, the power is swept from small-signal levels to heavy compression, and the bias is varied to fully exercise the device I-V plane. For the PHEMT/switch case, the power is swept up to +36 dBm so that the device sees power levels equivalent to a cellular transmit/receive switch. Lastly, for the HBT/amplifier case, a fitting metric is presented, which allows a quantitative comparison of the "goodness of the fit" of various models to the measured power sweep data.