F. Dai, Lakshmi S. J. Chimakurthy, D. Yang, J. Huang, R. Jaeger
{"title":"A low power 5 GHz direct digital synthesizer designed in SiGe technology","authors":"F. Dai, Lakshmi S. J. Chimakurthy, D. Yang, J. Huang, R. Jaeger","doi":"10.1109/SMIC.2004.1398157","DOIUrl":null,"url":null,"abstract":"This paper presents a low power high-speed direct digital synthesizer (DDS), designed in a 47 GHz SiGe technology. The ROM-less DDS includes an 8-bit accumulator and an 8 bit cosine-weighted digital-to-analog converter (DAC) operating at a maximum 5 GHz clock frequency. The DDS core occupies an area of 2 mm/sup 2/ and consumes less than 2 W power with a 3.3 V supply voltage. The 5 GHz MMIC provides a frequency synthesis and modulation means for L-band applications.","PeriodicalId":288561,"journal":{"name":"Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SMIC.2004.1398157","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 13
Abstract
This paper presents a low power high-speed direct digital synthesizer (DDS), designed in a 47 GHz SiGe technology. The ROM-less DDS includes an 8-bit accumulator and an 8 bit cosine-weighted digital-to-analog converter (DAC) operating at a maximum 5 GHz clock frequency. The DDS core occupies an area of 2 mm/sup 2/ and consumes less than 2 W power with a 3.3 V supply voltage. The 5 GHz MMIC provides a frequency synthesis and modulation means for L-band applications.