A post-deployment IC trust evaluation architecture

Yier Jin, Dzmitry Maliuk, Y. Makris
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引用次数: 5

Abstract

The use of side-channel parametric measurements along with statistical analysis methods for detecting hardware Trojans in fabricated integrated circuits has been studied extensively in recent years, initially for digital designs but recently also for their analog/RF counterparts. Such post-fabrication trust evaluation methods, however, are unable to detect dormant hardware Trojans which are activated after a circuit is deployed in its field of operation. For the latter, an on-chip trust evaluation method is required. To this end, we present a general architecture for post-deployment trust evaluation based on on-chip classifiers. Specifically, we discuss the design of an on-chip analog neural network which can be trained to distinguish trusted from untrusted circuit functionality based on simple measurements obtained via on-chip measurement acquisition sensors. The proposed method is demonstrated using a Trojan-free and two Trojan-infested variants of a wireless cryptographic IC design, as well as a fabricated programmable neural network experimentation chip. As corroborated by the obtained experimental results, two current measurements suffice for the on-chip classifier to effectively assess trustworthiness and, thereby, detect hardware Trojans that are activated after chip deployment.
部署后IC信任评估架构
近年来,利用侧通道参数测量和统计分析方法来检测制造集成电路中的硬件木马已经得到了广泛的研究,最初用于数字设计,但最近也用于模拟/射频对偶。然而,这种事后信任评估方法无法检测到在电路部署到其运行领域后激活的休眠硬件木马。对于后者,需要一种片上信任评估方法。为此,我们提出了一种基于片上分类器的部署后信任评估通用架构。具体来说,我们讨论了一个片上模拟神经网络的设计,该网络可以根据片上测量采集传感器获得的简单测量结果进行训练,以区分可信和不可信的电路功能。采用一种无木马和两种感染木马的无线加密IC设计变体,以及一种预制的可编程神经网络实验芯片,对所提出的方法进行了验证。正如获得的实验结果所证实的那样,两个当前测量足以使片上分类器有效地评估可信度,从而检测芯片部署后激活的硬件木马。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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