Novel Devices And Circuits

J. Chickanosky, R. Frye
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Abstract

The first two papers discuss novel buffer designs. One driver uses a capacitance feedback to control the output slew, reducing the power noise. The other buffer design utilizes a new CMOS logic circuit with a unique delay propagation characteristic that makes it much faster than conventional CMOS logic. There are two papers on SRAM circuit techniques. One paper presents a new approach based on current-mode to reduce energy and improve the speed of write and read access in multi-port SRAMS. The other SRAM paper presents a new currentmode sense amplifier design which can be used in the design of a low-voltage low power SRAM for ASIC applications.
新型器件和电路
前两篇论文讨论了新的缓冲器设计。一个驱动器使用电容反馈来控制输出压转,从而降低功率噪声。另一种缓冲器设计利用一种新的CMOS逻辑电路,具有独特的延迟传播特性,使其比传统的CMOS逻辑快得多。有两篇论文是关于SRAM电路技术的。本文提出了一种基于电流模式的多端口sram的节能和提高读写速度的新方法。另一篇SRAM论文提出了一种新的电流模式检测放大器设计,可用于ASIC应用的低压低功耗SRAM的设计。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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