TCAD study of the Holding-Voltage Modulation in Irradiated SCR-LDMOS for HV ESD Protection

Abstract

This paper investigates a method to increase the holding voltage in a conventional Silicon Controlled Rectifier (SCR) for ESD power clamping. Specifically, a SCR-LDMOS device with 150 V trigger voltage and 9 V holding voltage is investigated assuming the application of high-energy electron irradiation. Based on previous experimental and TCAD investigations, the most relevant kind of defects is accounted for at different irradiation levels clearly showing an increase of the holding voltage up to 16 V without any other significant change in the TLP characteristics. The role of trapped charges in the holding regime has been addressed up to the thermal runaway through extensive numerical investigations.