{"title":"ReaLSE: Reconfigurable Lightweight Security Engines for Trusted Edge Devices","authors":"Mohamed El-Hadedy, Xinfei Guo","doi":"10.1109/ICCS56666.2022.9936234","DOIUrl":null,"url":null,"abstract":"Security has become a serious threat for IoT devices running on the edge. While IoT chips are usually subject to numerous constraints such as power, form factor, cost and more. The budget for on-chip security engines is very limited. A worldwide competition was launched by NIST to define lightweight cryptographic (LWC) primitives for securing tiny devices. So far, the final round of the LWC competition consists of ten candidates’ submissions that can be categorized as substitution box (Sbox)-based and add-rotate-xor (ARX)-based. The former heavily involves memory accessibility, while the latter involves heavy computations such as additions and rotations. While one can design customized accelerator for each LWC cipher, it lacks generality and involves huge design effort. In the meanwhile, a full reconfigurable system will incur hardware overheads in terms of area and power. Inspired by domain-specific architecture, we propose a series of compact security engine architectures called Reconfigurable Lightweight Security Engines (ReaLSE), that are coupled with some levels of reconfigurability such as different word sizes, different encryption/decryption processes or even different security levels. By striking a balance between flexibility and hardware cost, our proposed designs were able to integrate micro-architectural level optimizations that are specific to certain LWC ciphers while supporting various modes. This new design family increases the availability and adaptability of embedded LWC engines for IoT. We will present various such reconfigurable designs including both ARX and S-boxed based ciphers. Architecture details along with hardware implementation results will also be discussed.","PeriodicalId":293477,"journal":{"name":"2022 IEEE 4th International Conference on Circuits and Systems (ICCS)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE 4th International Conference on Circuits and Systems (ICCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCS56666.2022.9936234","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
Security has become a serious threat for IoT devices running on the edge. While IoT chips are usually subject to numerous constraints such as power, form factor, cost and more. The budget for on-chip security engines is very limited. A worldwide competition was launched by NIST to define lightweight cryptographic (LWC) primitives for securing tiny devices. So far, the final round of the LWC competition consists of ten candidates’ submissions that can be categorized as substitution box (Sbox)-based and add-rotate-xor (ARX)-based. The former heavily involves memory accessibility, while the latter involves heavy computations such as additions and rotations. While one can design customized accelerator for each LWC cipher, it lacks generality and involves huge design effort. In the meanwhile, a full reconfigurable system will incur hardware overheads in terms of area and power. Inspired by domain-specific architecture, we propose a series of compact security engine architectures called Reconfigurable Lightweight Security Engines (ReaLSE), that are coupled with some levels of reconfigurability such as different word sizes, different encryption/decryption processes or even different security levels. By striking a balance between flexibility and hardware cost, our proposed designs were able to integrate micro-architectural level optimizations that are specific to certain LWC ciphers while supporting various modes. This new design family increases the availability and adaptability of embedded LWC engines for IoT. We will present various such reconfigurable designs including both ARX and S-boxed based ciphers. Architecture details along with hardware implementation results will also be discussed.