8-Bit ALU Design using m-GDI Technique

Abstract

In this paper, the design of an 8-bit Arithmetic Logic Unit (ALU) using Gate Diffusion Input (GDI) technique is proposed. Implementing the GDI technique in designing the ALU results in low power consumption and the number of transistors it requires is much less. Which result in reduced chip-area and power consumption - two of the most important parameters in digital VLSI design. In this design, 3T XOR is used in the full adder. Moreover, a novel 1-to-8 demultiplexer circuit has been used in the design as well. A considerable number of research papers are studied and compared various logic families and then finally designed an 8-bit ALU which can perform 8 different operations. The design is validated using the schematic editor-DHCH 3.5 and the simulation have been carried out using Xilinx ISE 14.7.