{"title":"A Fully Integrated CMOS Sensor for Pico-current Measurement on Solid-state Nanopore Devices","authors":"Jungsuk Kim, K. Pedrotti, W. Dunbar","doi":"10.5220/0003732000270031","DOIUrl":null,"url":null,"abstract":"In this paper, an integrated high-sensitivity patch-clamp sensor is proposed to measure the ultra-low current variation of a solid-state nanopore device. This sensor amplifier consists of three stages: 1) a headstage, 2) a difference amplifier and 3) a unity-gain buffer. For the headstage, a resistive-feedback transimpedance amplifier is employed to convert the small current to a readable voltage. The addition of a programmable gain to the second-stage difference amplifier allows the maximum gain to be increased to 168dBΩ. This sensor is fabricated in a 0.35μm CMOS process and is tested with an 80nm-diameter solid-state nanopore. We present a detailed circuit analysis for the low-noise patch-clamp design and its noise measurement result in this paper.","PeriodicalId":357085,"journal":{"name":"International Conference on Biomedical Electronics and Devices","volume":"83 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-08-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Conference on Biomedical Electronics and Devices","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.5220/0003732000270031","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In this paper, an integrated high-sensitivity patch-clamp sensor is proposed to measure the ultra-low current variation of a solid-state nanopore device. This sensor amplifier consists of three stages: 1) a headstage, 2) a difference amplifier and 3) a unity-gain buffer. For the headstage, a resistive-feedback transimpedance amplifier is employed to convert the small current to a readable voltage. The addition of a programmable gain to the second-stage difference amplifier allows the maximum gain to be increased to 168dBΩ. This sensor is fabricated in a 0.35μm CMOS process and is tested with an 80nm-diameter solid-state nanopore. We present a detailed circuit analysis for the low-noise patch-clamp design and its noise measurement result in this paper.