{"title":"Schrödinger-Poisson and Monte Carlo analysis of III–V MOSFETs for high frequency and low consumption applications","authors":"Ming Shi, J. Saint-Martin, A. Bournel, P. Dollfus","doi":"10.1109/SISPAD.2010.5604563","DOIUrl":null,"url":null,"abstract":"III–V MOSFET (Metal Oxide Semiconductor Field Effect Transistor) with high-κ gate dielectric stack appears as a viable alternative to enhance not only microwave performance but also logic circuits with low supply voltage. This allows fulfilling high-speed and low-power specifications for intelligent applications. Indeed, combining weak gate leakage of standard MOSFETs and good RF performance of HEMTs (High Electron Mobility Transistors), they could outperform end-of-roadmap standard Si-MOSFET. Using full 2D Poisson-Schrödinger solver and a semi-classical Ensemble Monte Carlo device simulator, various 50nm MOSFET and HEMT are investigated in terms of gate charge control and both static and dynamic I–V performance. In particular, Y parameters are carefully extracted from time-varying currents. This comparative study allows us to propose an optimized III–V nano-FET architecture with high-frequency performance under low power supply.","PeriodicalId":331098,"journal":{"name":"2010 International Conference on Simulation of Semiconductor Processes and Devices","volume":"86 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 International Conference on Simulation of Semiconductor Processes and Devices","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SISPAD.2010.5604563","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
III–V MOSFET (Metal Oxide Semiconductor Field Effect Transistor) with high-κ gate dielectric stack appears as a viable alternative to enhance not only microwave performance but also logic circuits with low supply voltage. This allows fulfilling high-speed and low-power specifications for intelligent applications. Indeed, combining weak gate leakage of standard MOSFETs and good RF performance of HEMTs (High Electron Mobility Transistors), they could outperform end-of-roadmap standard Si-MOSFET. Using full 2D Poisson-Schrödinger solver and a semi-classical Ensemble Monte Carlo device simulator, various 50nm MOSFET and HEMT are investigated in terms of gate charge control and both static and dynamic I–V performance. In particular, Y parameters are carefully extracted from time-varying currents. This comparative study allows us to propose an optimized III–V nano-FET architecture with high-frequency performance under low power supply.