{"title":"Polygonal routing network for FPGA/FPIC","authors":"Mao-Hsu Yen, Mon-Chau Shie, S. Lan","doi":"10.1109/VTSA.1999.786011","DOIUrl":null,"url":null,"abstract":"The programmable routing network of Field Programmable Gate Array (FPGA) and Field Programmable Interconnection Chip (FPGA) affects its performance, die size, and routability. This paper proposes a polygonal routing network that consists of polygonal switch modules and many rectangular connection modules. For a logic module with 2n pins, the number of switches used in the polygonal routing module is less than the conventional routing module by O(/spl radic/n).","PeriodicalId":237214,"journal":{"name":"1999 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers. (Cat. No.99TH8453)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-06-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1999 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers. (Cat. No.99TH8453)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VTSA.1999.786011","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
The programmable routing network of Field Programmable Gate Array (FPGA) and Field Programmable Interconnection Chip (FPGA) affects its performance, die size, and routability. This paper proposes a polygonal routing network that consists of polygonal switch modules and many rectangular connection modules. For a logic module with 2n pins, the number of switches used in the polygonal routing module is less than the conventional routing module by O(/spl radic/n).