{"title":"System on chip for comparison of precise time sources","authors":"J. Dostál, V. Smotlacha","doi":"10.1109/EWDTS.2016.7807683","DOIUrl":null,"url":null,"abstract":"This paper deals with a precise time, particularly comparison of diverse precise time transfer methods and sources. We deal with two ways of the precise time acquisition - the dedicated time and frequency transfer infrastructure and the time network protocols. For the needs of distinct time and frequency methods evaluation, we designed a FPGA based System on Chip (SoC) that may acquire time and frequency from dedicated time transfer infrastructure or from a standard TCPIP network utilizing IEEE 1588 or NTP protocol. The SoC is implemented on a Zynq field-programmable gate array (FPGA). We also present an experience with the design and intended applications of our system.","PeriodicalId":364686,"journal":{"name":"2016 IEEE East-West Design & Test Symposium (EWDTS)","volume":"83 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE East-West Design & Test Symposium (EWDTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EWDTS.2016.7807683","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
This paper deals with a precise time, particularly comparison of diverse precise time transfer methods and sources. We deal with two ways of the precise time acquisition - the dedicated time and frequency transfer infrastructure and the time network protocols. For the needs of distinct time and frequency methods evaluation, we designed a FPGA based System on Chip (SoC) that may acquire time and frequency from dedicated time transfer infrastructure or from a standard TCPIP network utilizing IEEE 1588 or NTP protocol. The SoC is implemented on a Zynq field-programmable gate array (FPGA). We also present an experience with the design and intended applications of our system.