PANACA: An Open-Source Configurable Network-on-Chip Simulation Platform

Julian Haase, Alexander Groß, Maximilian Feichter, D. Göhringer
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引用次数: 1

Abstract

Network-on-Chip (NoC) is the central communication infrastructure of modern Multi-Processor Systems-on-Chip (MPSoCs), as the number of processing elements integrated on a single chip is continuously increasing. The exploration of the huge design space offered by novel NoC-based MPSoC architectures requires early and accurate system modeling and simulation. This paper introduces PANACA, an open-source highly configurable NoC simulator written in SystemC-TLM. PANACA enables fast simulation of MPSoCs using NoC-based architectures and is designed for a modular, flexible and precise modeling of network elements. It offers a wide set of accurate configurable parameters, such as topology, routing algorithm and flow control. The provided simulation and exploration management allows a detailed and automated evaluation of the huge design space.
PANACA:一个开源可配置的片上网络仿真平台
片上网络(NoC)是现代多处理器片上系统(mpsoc)的核心通信基础设施,因为集成在单个芯片上的处理元件数量不断增加。探索新型基于noc的MPSoC架构提供的巨大设计空间需要早期和准确的系统建模和仿真。本文介绍了用SystemC-TLM编写的开源、高可配置的NoC模拟器PANACA。PANACA使用基于noc的架构实现mpsoc的快速仿真,并为网络元素的模块化、灵活和精确建模而设计。它提供了广泛的精确可配置参数,如拓扑,路由算法和流量控制。提供的模拟和探索管理允许对巨大的设计空间进行详细和自动化的评估。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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