Design and Analysis of Bulk and Junctionless MOSFET Based Circuits for Low Power Applications

2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS) Pub Date : 2020-07-01 DOI:10.1109/VLSIDCS47293.2020.9179929

Saurabh Halder, Rahul Paul, Swarnil Roy

引用次数: 0

Abstract

The main focus of this work is to study and analyze the Transmission Gate based combinational and sequential digital circuit performance using the Junctionless and BULK technology. The digital circuits chosen for this work are D-FLIP FLOP and MULTIPLEXER. Simulations are done in Tanner EDA and SILVACO. TSMC models of different channel lengths are taken for the measurement of various circuit parameters for BULK case. Finally, a comparison of Junction Less and BULK technology is given.

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基于MOSFET的低功耗无结体电路的设计与分析

本文的工作重点是研究和分析基于传输门的组合和顺序数字电路的性能。为此选择的数字电路是D-FLIP - FLOP和MULTIPLEXER。在Tanner EDA和SILVACO中进行了仿真。采用不同通道长度的TSMC模型对BULK情况下的各种电路参数进行了测量。最后，对Less和BULK技术进行了比较。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS)

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