Multi-Bit Read and Write Methodologies for Diode-MTJ Crossbar Array

Mohammad Nasim Imtiaz Khan, Swaroop Ghosh
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Abstract

Crossbar arrays using emerging Non-Volatile Memory (NVM) technologies offer high density, fast access speed and low-power. However, the bandwidth of the crossbar is limited to single-bit read/write per access to avoid the selection of undesirable bits. In this work, we propose a technique to perform multi-bit read and write in a diode-MTJ (Magnetic Tunnel Junction) crossbar array. The simulation shows that the biasing voltage of half-selected cells can be adjusted to improve the sense margin during read which in turn, reduces the sneak path through the half-selected cells. Results indicate biasing the half-selected cells by 700mV can enable reading as much as 512bits while sustaining 512×512 crossbar with 2.04 years retention. During write operation, the half-selected cells are biased with a pulse voltage source in addition to V/2 scheme which increases the write latency of these cells and enables writing 2 bits while keeping the half-selected bits undisturbed. The 2bit writing requires pulsing by 50mV to optimize energy.
二极管- mtj交叉棒阵列的多比特读写方法
Crossbar阵列采用新兴的非易失性存储器(NVM)技术,提供高密度、快速访问速度和低功耗。但是,为了避免选择不需要的比特,交叉条的带宽被限制为每次访问的单比特读/写。在这项工作中,我们提出了一种在二极管-磁隧道结(mtj)交叉棒阵列中执行多比特读写的技术。仿真结果表明,可以通过调整半选择单元的偏置电压来提高读取过程中的感知裕度,从而减少通过半选择单元的潜行路径。结果表明,将半选择的细胞偏置700mV可使读取多达512bit,同时保持512×512 crossbar,保留时间为2.04年。在写操作期间,除了V/2方案外,半选择单元还使用脉冲电压源进行偏置,这增加了这些单元的写延迟,并在保持半选择位不受干扰的情况下实现2位的写入。2bit写入需要50mV的脉冲来优化能量。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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