{"title":"A high-isolation ku-band SPDT switch in 0.35μm SiGe BiCMOS technology","authors":"ZhengLe Fan, Kaixue Ma, Shouxian Mou, F. Meng","doi":"10.1109/EDAPS.2017.8276986","DOIUrl":null,"url":null,"abstract":"In this paper, a compact high-isolation Ku-band SPDT switch using triple-well transistors based on 0.35μm SiGe BiCMOS process is proposed. Improved series-shunt-shunt topology is used in this design to enhance the isolation and to reduce the insertion loss simultaneously. In order to improve the power handling capability, body-floating transistor is employed and analyzed. The full-wave simulated results show that the insertion loss of the ON state path is better than 1.76 dB, and the isolation of the OFF state path is higher than 40.8 dB in the entire designed frequency band of 14–18 GHz. The output P1dB of the ON state path at center frequency 16 GHz is 10.51dBm, and the core area of this SPDT is only 0.36×0.41 mm2 excluding testing pads.","PeriodicalId":329279,"journal":{"name":"2017 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS)","volume":"70 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDAPS.2017.8276986","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In this paper, a compact high-isolation Ku-band SPDT switch using triple-well transistors based on 0.35μm SiGe BiCMOS process is proposed. Improved series-shunt-shunt topology is used in this design to enhance the isolation and to reduce the insertion loss simultaneously. In order to improve the power handling capability, body-floating transistor is employed and analyzed. The full-wave simulated results show that the insertion loss of the ON state path is better than 1.76 dB, and the isolation of the OFF state path is higher than 40.8 dB in the entire designed frequency band of 14–18 GHz. The output P1dB of the ON state path at center frequency 16 GHz is 10.51dBm, and the core area of this SPDT is only 0.36×0.41 mm2 excluding testing pads.