High performance Flash memory for 65 nm embedded automotive application

2010 IEEE International Memory Workshop Pub Date : 2010-05-16 DOI:10.1109/IMW.2010.5488312

F. Piazza, C. Boccaccio, S. Bruyère, Riccardo Cea, Bill Clark, N. Degors, Christopher N. Collins, A. Gandolfo, A. Gilardini, E. Gomiero, Pierre-Marie Mans, G. Mastracchio, D. Pacelli, N. Planes, J. Simon, M. Weybright, A. Maurelli

引用次数: 13

Abstract

In this paper the results obtained for a new process flow that integrates a high performance flash cell for automotive application with a state of the art 65nm CMOS have been presented. Despite the several specific process steps introduced for the first time on embedded technologies, the MOS performances have not been impacted by the integration of the Flash cell and the related HV MOS and the results obtained on a 4Mbit Flash array are very promising.

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65纳米嵌入式汽车应用的高性能闪存

本文介绍了一种新的工艺流程的结果，该流程将高性能汽车闪存单元与最先进的65nm CMOS集成在一起。尽管在嵌入式技术中首次引入了几个具体的工艺步骤，但Flash单元与相关HV MOS的集成并未影响MOS的性能，并且在4Mbit闪存阵列上获得的结果非常有希望。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

2010 IEEE International Memory Workshop

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