Effects of the previous pulse shift and filter on the symbol synchronizer PLL

Abstract

We will study the effects of the shift of the previous pulse temporal position (between P1 and P2) on the symbol synchronizers jitter behavior. Each pulse temporal position (P1 and P2), with the same previous filter, forms a group with four different carrier PLL (phase lock loop) namely the analog, hybrid, combinational and sequential. The main objective is to study the synchronizers output jitter UIRMS (unit interval root mean squared) as function of the input SNR (signal to noise ratio).