Research accelerator for multiple processors

D. Patterson, Arvind, K. Asanović, Derek Chiou, J. Hoe, C. Kozyrakis, Shih-Lien Lu, M. Oskin, J. Rabaey, J. Wawrzynek
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引用次数: 53

Abstract

This article consists of a collection of slides from the author's conference presentation on RAMP, or research acclerators for multiple processors. Some of the specific topics discussed include: system specifications and architecture; uniprocessor performance capabilities; RAMP hardware and description language features; RAMP applications development; storage capabilities; and future areas of technological development.
多处理器研究加速器
本文由作者关于RAMP(或多处理器研究加速器)的会议演讲的幻灯片集合组成。讨论的一些具体主题包括:系统规格和体系结构;单处理器性能;RAMP硬件和描述语言功能;RAMP应用程序开发;存储功能;以及未来的技术发展领域。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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