An effective fault simulation method for core based LSI

Abstract

We examined effective usage of fault simulation to reduce enormous handling time for fault simulation, and applied it in our LSI development. Random sampling method, DFS (Distributed Fault Simulation), a selection of most suitable FPP(faults per pass) and elimination of hyper faults are applied here to realize necessary handling speed of dozens of times faster than the present usage. It is effective in a fault simulation to simulate the best vector first that increases the fault coverage most. Furthermore, we would like to give a new suggestion that the density of mask patterns is taken into consideration as a factor of fault coverage and also its physical correctness is estimated.