On statistical behavior of branch coverage in testing behavioral VHDL models

Abstract

During behavioral model verification, it is important to determine the stopping point for the current test strategy and for moving to a different test strategy. It has been shown that the location of the stopping point is highly dependent on the statistical model one should choose to describe the coverage behavior during the verification process. This paper presents a study on the coverage behavior of VHDL models. The resulting statistical behavior is compared to the statistical behavior used by some commonly used models for software reliability and shows the inappropriateness of applying the existing models for the behavior model verification.