{"title":"A fully integrated 75–83 GHz FMCW synthesizer for automotive radar applications with −97 dBc/Hz phase noise at 1 MHz offset and 100 GHz/mSec maximal chirp rate","authors":"J. Vovnoboy, Run Levinger, N. Mazor, D. Elad","doi":"10.1109/RFIC.2017.7969026","DOIUrl":null,"url":null,"abstract":"We present a SiGe BiCMOS fully integrated 75–83 GHz FMCW synthesizer for automotive radar applications. Performance enhancements were achieved by utilizing the bulk-drain parasitic variable capacitance of P-channel transistors, embedded in a gm-boosted Colpitts VCO, for frequency control. This mechanism was incorporated in a dual path PLL, providing low loop bandwidth variation over the whole output frequency range, −97 dBc/Hz phase noise at 1 MHz offset and maximum chirp rate of 100 GHz/mSec.","PeriodicalId":349922,"journal":{"name":"2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2017.7969026","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10
Abstract
We present a SiGe BiCMOS fully integrated 75–83 GHz FMCW synthesizer for automotive radar applications. Performance enhancements were achieved by utilizing the bulk-drain parasitic variable capacitance of P-channel transistors, embedded in a gm-boosted Colpitts VCO, for frequency control. This mechanism was incorporated in a dual path PLL, providing low loop bandwidth variation over the whole output frequency range, −97 dBc/Hz phase noise at 1 MHz offset and maximum chirp rate of 100 GHz/mSec.