Comparison of thermal stress under TCT between SiC and Si power devices using direct chip-bonding with ag sintered layer on Cu plate

Abstract

This work clarifies the thermal stress profiles and concentrations under thermal cycling test by 3D multi-physics solver for SiC and Si power device chip systems using Ag sintering chip-attachment on Cu plate. A comparison analysis between SiC and Si showed that the maximum stress value in SiC structure is higher than that in Si structure for both Ag sintering and conventional solder chip-attachments due to larger Young's modulus of SiC. The thickness of Ag sintered layer is five times thinner than conventional solder, and this slightly increases the stress in Ag sintered layer for SiC structures with the Cu plate thickness below 3 mm. To reveal the physical mechanism of thermal stress the stress directions are also clarified. It was found that the normal stress is the major component of von Mises stress at the corners of Ag sintered layer, and both SiC and Si chips.