Novel Placement Bias For Realizing Highly Reliable Physical Unclonable Functions on FPGA

Abstract

The Physical Unclonable Functions have been widely used to provide software as well as hardware security for the cyber-physical systems. They are used for performing significant tasks such as generating cryptography keys, device authentication, securing against IP Piracy; and have also been used to produce root of Trust. However, they lack in reliability issues. We present a novel approach for improving the reliability of Ring Oscillator PUF with the minimum area concerning LUTs. We use variation-aware method to find out the more suitable location for PUF mapping, thus leading to enhanced the PUF reliability. We have designed and tested proposed methodology on Xilinx -7 Series FPGAs. The proposed approach achieves higher reliability of 99.7%, which is significant improvement compared to existing ROPUF methods.