Parallel Integrated State Variable Filter Circuit Design

J. Ren, Fuqiang Wang, Rui Min, Xiao-ning Xin
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引用次数: 4

Abstract

In this paper, a parallel state variable filter circuit is designed. The integrated operational amplifier is used as the amplifying circuit. The state variable method is used to solve the differential equation to realize the high-pass, low-pass and band-pass band-stop filtering functions of parallel filtering. Through the Cadence software simulation, the state variable filter high-pass circuit cut-off frequency is 32.9KHz, the low-pass circuit cut-off frequency is 1.7KHz, the band-pass circuit center frequency is 7.0KHz, the band-stop circuit center frequency is 7.0KHz. The quality factor of the filter is 0.2, which is significantly better than other designs under the same conditions. Finally, the circuit layout is drawn using Cadence software. In this paper, the circuit simulation, layout drawing and verification are carried out with Virtuso, Spectre and Caliber software integrated in the Cadence system.
并联集成状态可变滤波电路设计
本文设计了一种并联状态可变滤波电路。放大电路采用集成运算放大器。采用状态变量法求解微分方程,实现并行滤波的高通、低通和带通带阻滤波功能。通过Cadence软件仿真,状态变量滤波器高通电路截止频率为32.9KHz,低通电路截止频率为1.7KHz,带通电路中心频率为7.0KHz,带阻电路中心频率为7.0KHz。该滤波器的品质因数为0.2,在相同条件下明显优于其他设计。最后利用Cadence软件绘制电路布置图。本文利用Cadence系统中集成的Virtuso、Spectre和Caliber软件进行了电路仿真、布置图绘制和验证。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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