Event driven analog modeling for the verification of PLL frequency synthesizers

Abstract

The focus of this work is to provide a efficient modeling approach for the functional verification of complex analog frequency synthesizers. The event driven analog modeling approach uses the double precision data type wreal (supported by VerilogAMS), that enables analog accuracy in the digital simulation domain. It is therefore possible to separate high frequency signal paths in the frequency synthesizers from the analog domain, in order to archive higher simulation efficiency for fast verification purposes. The modeling approach and an investigation of the necessary accuracy requirements for the verification including phase noise performances of the analog frequency synthesizers is presented. The proposed approach is demonstrated on baseof a sub micron CMOS Fractional-N frequency synthesizer and compared with different traditional modeling approaches, like phase model and pure digital model. The paper concludes with a proposal of a verification approach for RF mixed signal systems.