On the implementation of a Intellectual Property protection based on information hiding

Abstract

System-On-Chip (SOC) based design process creates a revolution in VLSI industry as it increases the design efficiency, operating speed and reduces the cost development time. In SOC design method, components are required in electronic form called Intellectual Property (IP). IP reuse and exchange is beneficial for the design process but sharing IP blocks causes considerable security risks regarding copyright. In this paper, we present an approach to embed the ownership proof as a part of the design, using information hiding. At the starting of IP design cycle additional information added to the design and this help to identify the copyright. The experimental results of FPGA implementation show that the design can be efficiently marked by proposed method with low overhead.