A CMOS Readout Circuit for Silicon Resonant Accelerometer with 32-ppb bias stability

Lin He, Y. Xu, M. Palaniapan
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引用次数: 1

Abstract

This paper describes a fully-differential CMOS readout circuit for silicon micro-resonant accelerometer. Tested with a SOI resonator, the readout chip sustains the oscillation at 110 kHz with a phase noise of -36 dBc@1 Hz and a bias stability of 0.0035 Hz or 32 ppb, which can be translated to an amplitude noise of 1 Aring/radicHz down to 0.05 Hz and stability of 0.22 Aring up to 100 seconds. The chip is fabricated in a 0.35-mum CMOS process and draws 5 mA under a 3.3-V single supply.
一种32 ppb偏置稳定硅谐振加速度计的CMOS读出电路
介绍了一种用于硅微谐振加速度计的全差分CMOS读出电路。用SOI谐振器进行测试,读出芯片在110 kHz下保持振荡,相位噪声为-36 dBc@1 Hz,偏置稳定性为0.0035 Hz或32 ppb,可转换为1 Aring/radicHz的振幅噪声至0.05 Hz,稳定性为0.22 Aring长达100秒。该芯片采用0.35 μ m CMOS工艺制造,在3.3 v单电源下可吸收5毫安。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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