A low-power auto-zeroed comparator for column-paralleled 14b SAR ADCs of 384×288 IRFPA ROIC

Abstract

This paper presents a low power comparator with auto-zeroed technique for the readout chain of a 384×288 infrared focal plane array (IRFPA). To overcome the high power consumption of column-paralleled application, a novel inverter=based pre-amplifier is introduced. The performances of the proposed comparator are verified by a 14-bit column paralleled Successive-Approximation-Register (SAR) A/D converter which is developed in a 0.35um CMOS-based process technology. The SFDR of the A/D converter is up to 93dB at a sampling clock of 31.25 KHz with an input signal of 1.009 KHz. The overall static power of the 384 column-paralleled ADCs is less than 50mW.