Design-for-FAST: Supporting X-tolerant compaction during Faster-than-at-Speed Test

M. Kampmann, S. Hellebrand
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引用次数: 3

Abstract

Small Delay Faults (SDFs) on short paths may escape even state-of-the-art at-speed tests. Faster-than-at-Speed Test (FAST) works with increased clock frequencies to detect these faults. However, FAST also introduces an increased amount of unknown logic values (X-values) into the test responses, which makes test response compaction difficult. The paper at hand presents and evaluates a Design for Test (DFT) approach specifically tuned to FAST. It utilizes a special scan-chain configuration in combination with an adaptive masking scheme - the required mask data is generated by respective frequency-aware algorithms. Experimental results indicate that this combination of scan-chain configuration and output masking can achieve high reduction in X-values (up to 95%) without too much loss of fault information at a reasonable amount of control overhead. The approach also has a significant impact on the number of intermediate signatures required by an X-canceling MISR, which can be reduced by up to 68%.
fast设计:在快于速度测试期间支持x容忍压实
短路径上的小延迟故障(sdf)可能会躲过最先进的高速测试。快于速度测试(FAST)通过增加时钟频率来检测这些故障。然而,FAST也在测试响应中引入了大量未知的逻辑值(x值),这使得测试响应压缩变得困难。本文提出并评估了一种专门针对FAST的测试设计(DFT)方法。它利用特殊的扫描链配置与自适应屏蔽方案相结合-所需的掩码数据由各自的频率感知算法生成。实验结果表明,这种扫描链配置和输出掩蔽的组合可以在合理的控制开销下,在不丢失太多故障信息的情况下,实现x值的高降低(高达95%)。该方法还对抵消x的MISR所需的中间签名数量有显著影响,最多可减少68%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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