A Discrete Heuristics Approach to Predictive Evaluation of Semi-Custom IC Layouts

Abstract

The significant computational requirements of VLSI layout suggest that it may be desirable to estimate the feasibility of a task before actually performing the task. The system described in this paper uses a discrete heuristics approach to estimate the future quality of a semi-custom layout before any placement or routing is done. It does this evaluation with respect to critical parameters such as routability, area utilization, and wire length, using heuristics arranged in a discrete graph structure. The system can handle user-specified non-rectangular layout shapes. Its rule-based structure allows easy observation and modification of individual heuristics for the purposes of "fine tuning." The system also detects potential problems and suggests possible solutions.